At the recent Embedded World 2024 event, which took place in Nuremberg, Germany from the 9th to the 11th of April, Cadence and Dream Chip proudly unveiled Dream Chip’s latest automotive System on Chip (SoC). This advanced SoC incorporates the Tensilica Vision P6 DSP IP and Cadence’s design IP controllers, and was manufactured using the complete Cadence Verification solution and full-flow digital implementation, including signoff.
Developed using GlobalFoundries 22FDX technology, the SoC has been specifically designed to meet the energy-efficient requirements of the automotive industry. It was created as part of the ZuSE-KI-Mobil (ZuKIMo) project, which is focused on developing AI accelerator systems for advanced driver assistance systems (ADAS). The SoC contributes to the support of the local European semiconductor supply chain for automotive applications, marking a significant step forward in automotive technology advancement.
The utilization of Cadence Verification, Implementation, and Signoff solutions played a critical role in enabling automotive designers to meet safety, quality, and reliability objectives, leading to certification up to ISO 26262 ASIL-D standards. This accomplishment was achieved without compromising the system’s power, performance, and area (PPA) targets, signifying a groundbreaking development in automotive technology.
Furthermore, the SoC integrates Tensilica Vision P6 DSP and AI cores, along with a variety of Digital IP controllers, to enhance the capabilities of advanced driver assistance systems. These features include Cadence’s innovative NPU AI IP, multi-functional Ethernet 10/100/1G MAC, and essential control interfaces such as SPI and RTC Control. The hardware integration is designed to power energy-efficient ADAS applications, significantly improving the automotive-grade quality, safety, and reliability of autonomous, connected, and electrified (ACE) vehicles.
Dr. Jens Benndorf, the managing director and CEO of Dream Chip Technologies, expressed great satisfaction with the collaboration, stating, “We worked closely with Cadence to deliver a complete automotive solution showcasing Cadence Tensilica AI-at-the-edge performance, alongside functional safety and the latest image signal processing to automotive OEMs and Tier-1s.” He also highlighted Dream Chip’s full implementation and sign-off of the energy-efficient automotive SoC, solidifying their position as an optimal design house choice for advanced automotive SoCs.
David Glasco, VP of research and development, Compute Solutions Group at Cadence, also shared his thoughts on the collaboration, emphasizing Cadence’s commitment to design innovation and excellence across all aspects of safety-critical and high-reliability IP, as well as the design and verification flow, resulting in the powerful ADAS demo.
The embedded world demo showcased the advanced capabilities of the SoC, demonstrating the power and flexibility of Cadence’s Tensilica IP in driving optimal ADAS features with the industry-leading Vision and AI cores.
To witness the SoC in action, a video of the demo at the Cadence embedded world 2024 booth is available. This represents a significant milestone in the development of advanced automotive SoCs, underlining the ongoing dedication to innovation and excellence in the automotive industry.